Ask a hardware team where a board is "done" and many will point at the moment they hit export in their layout tool. In reality, that export is the start of a second engineering phase: CAM — Computer-Aided Manufacturing — the process that turns a design database into something a fab can actually build.
What CAM actually does
CAM takes your Gerber or ODB++ data and prepares it for a specific fabrication line:
- Normalizes the data — resolving layer mapping, aperture definitions, and legacy-format quirks.
- Applies fabrication allowances — etch compensation, solder-mask expansion, and drill-to-copper registration.
- Extracts a netlist — an IPC-D-356 list generated from the real copper for bare-board electrical test.
- Panelizes — step-and-repeat arrays with coupons, fiducials, and rout paths.
Why it drives yield
A design that passes your DRC can still fail at the fab. Your layout tool checks design rules; it does not know your fabricator's minimum annular ring, etch behavior, or plating window. CAM and DFM analysis close that gap — catching acute slivers, insufficient rings, and hanging copper before tooling is cut.
| Without CAM review | With CAM review |
|---|---|
| Design-intent netlist only | Netlist from actual copper |
| Generic DRC | Fab-specific rule deck |
| Surprise respins | Issues caught pre-tooling |
Where escapes come from
The expensive failures are the quiet ones: a netlist that disagrees with the artwork, a via with breakout on the worst-case layer, a mask sliver between fine-pitch pads. None of these stop the board from being built — they just make it fail later, in test or in the field.
Good CAM is invisible when it works. That is exactly why it matters — it is the difference between a first-pass build and a costly second spin.